1. Field of the Invention
The present invention relates to clocked integrated circuits generally, and more particularly to integrated circuits with signals having a pre-specified delay over a range of temperatures.
2. Description of Related Art
A variety of integrated circuits with different mission functions have high clock rates and as a result have precise timing requirements. For example, in some memory devices, the sense amplifier senses the data in one clock cycle, and therefore the timing of the data output in response to the read signal must be precisely controlled. However, producing signals on an integrated circuit with precise delays across a range of temperatures is a nontrivial problem due to the varying behavior of semiconductors that occurs at different temperatures.
One approach to addressing temperature variations is to employ a design methodology with a “worst case” modeling approach. Such an approach consistently underestimates circuit performance, and results in expensive over-design. A needed approach is to make integrated circuits that satisfy demanding timing requirements without unnecessary and expensive over-design.